Design of a time-to-digital converter (TDC) ASIC for the Phase- II upgrade of the ATLAS muon spectrometer
Abstract
To cope with a large amount of data and high event rate expected from the planned High-Luminosity LHC (HL-LHC) upgrade in pp collisions at √s = 13 TeV with the ATLAS detector, the ATLAS Monitored Drift Tube (MDT) detector will be used at the first-level trigger to improve the muon transverse momentum resolution and thus reduce the muon trigger rate. A new trigger and readout system has been proposed and the current MDT readout electronics will be replaced. In order for the new trigger system to digitize the discriminated muon drift signal, a new time-to-digital converter (TDC) Application Specific Integrated Circuit (ASIC) is needed. We have designed a TDC ASIC prototype using the TSMC 130 nm CMOS process and studied its performance such as timing, latency and power consumption. In this talk, I will present the design and test results of this new prototype.
- Publication:
-
APS April Meeting Abstracts
- Pub Date:
- 2019
- Bibcode:
- 2019APS..APRG09009G