Silicon tunnel FET with average subthreshold slope of 55 mV/dec at low drain currents
Abstract
In this paper we present a silicon tunnel FET based on line-tunneling to achieve better subthreshold performance. The fabricated device shows an on-current of Ion = 2.55 × 10-7 A/μm at Vds = Von = Vgs - Voff = -0.5 V for an Ioff = 1 nA/μm and an average SS of 55 mV/dec over two orders of magnitude of Id. Furthermore, the analog figures of merit have been calculated and show that the transconductance efficiency gm/Id beats the MOSFET performance at low currents.
- Publication:
-
Solid State Electronics
- Pub Date:
- May 2018
- DOI:
- 10.1016/j.sse.2018.01.007
- Bibcode:
- 2018SSEle.143...62N
- Keywords:
-
- Tunnel FET;
- Line-tunneling;
- Trap Assisted Tunneling (TAT)