A 0.076 mm2 12 b 26.5 mW 600 MS/s 4-Way Interleaved Subranging SAR- Delta Sigma ADC With On-Chip Buffer in 28 nm CMOS
Abstract
- Publication:
-
IEEE Journal of Solid-State Circuits
- Pub Date:
- December 2016
- DOI:
- 10.1109/JSSC.2016.2591553
- Bibcode:
- 2016IJSSC..51.2951V