Fault-Tolerant Design for Applications Exposed to Radiation
Abstract
This paper presents new methods and design concepts to make electronic CMOS devices fault-tolerant to radiation effects, especially single event effects. We describe how to mitigate single event effects (SEE) which can immediately affect the function of electronic components. The frequently occurring single event upset (SEU) can be handled well with existing techniques [1-11] and is briefly explained. Existing methods to mitigate potentially destructive single event latch-up (SEL) [3, 12 and 13] are also mentioned. The new design methods overcome the drawbacks particularly of existing SEL mitigation design methods and combine SEU and SEL mitigation on chip without changes to an existing CMOS technology. The system real-time behavior is not affected during detection and handling of radiation induced single event effects.
- Publication:
-
DASIA 2007 - Data Systems In Aerospace
- Pub Date:
- August 2007
- Bibcode:
- 2007ESASP.638E...9S