A polynomial-time heuristic for Circuit-SAT
Abstract
In this paper is presented an heuristic that, in polynomial time and space in the input dimension, determines if a circuit describes a tautology or a contradiction. If the circuit is neither a tautology nor a contradiction, then the heuristic finds an assignment to the circuit inputs such that the circuit is satisfied.
- Publication:
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arXiv e-prints
- Pub Date:
- November 2005
- DOI:
- arXiv:
- arXiv:cs/0511071
- Bibcode:
- 2005cs.......11071C
- Keywords:
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- Computer Science - Computational Complexity;
- Computer Science - Data Structures and Algorithms
- E-Print:
- 20 pages, 8 figures