High-performance carbon nanotube transistors on SrTiO3/Si substrates
Abstract
We report the chemical-vapor-deposition (CVD) growth of single-walled carbon nanotubes (SWNTs) on high-κ dielectric SrTiO3 on Si (STO/Si) substrates. Using the thin SrTiO3 as gate dielectric and Si as gate electrode, we fabricate high-performance semiconducting SWNT field-effect transistors and obtain a highest-to-date transconductance per channel width of 8900 μ S/μ m for these solid-state nanotube transistors. The increased gate capacitance can not explain such a high value, and we propose the increased electric field at the nanotube-electrode interface, due to the high-κ SrTiO_3, decreases or eliminates the nanotube-electrode Schottky barrier. We discuss these results within the context of the continuing research into SWNT-transistors and compare results for varying geometries and dielectrics. In fabricating these transistors, we also demonstrate the robustness of the STO/Si substrates to the highly-reducing, high-temperature environment of SWNT CVD-growth.
- Publication:
-
APS March Meeting Abstracts
- Pub Date:
- March 2004
- Bibcode:
- 2004APS..MARW16007F