Measuring, modeling, and minimizing capacitances in heterojunction bipolar transistors
Abstract
We demonstrate methods to separate junction and pad capacitances from on-wafer S-parameter measurements of HBTs with different areas and layouts. The measured junction capacitances are in good agreement with models, indicating that large-area devices are suitable for monitoring vendor epi-wafer doping. Measuring open HBTs does not give the correct pad capacitances. Finally, a capacitance comparison for a variety of layouts shows that bar-devices consistently give smaller base-collector values than multiple dot HBTs.
- Publication:
-
Solid State Electronics
- Pub Date:
- July 1996
- DOI:
- 10.1016/0038-1101(96)00005-6
- Bibcode:
- 1996SSEle..39..961A