Electrical Characterization of Plasma Etching Damage in Ulsi Processes
Abstract
In modern integrated circuit (IC) fabrication, plasma etching technique is used mainly due to the reason that it can provide precise anisotropic etching. However, energetic atoms, UV photons, ions and electrons as well as large plasma-substrate potential difference present during the plasma etching process can all have detrimental effects and potentially degrade the gate oxide and the processed device. The objective of this work is electrically characterize and understand the plasma etching damage mechanisms and their impact on device reliability. One of the important aims of this work is to establish and develop an electrical characterization methodology to assess plasma damage. In addition, due to an increasing interest towards the low temperature operation of MOSFETs owing to their various advantages, the impact of plasma damage on device low temperature operation is investigated. In addition to oxide charging damage, a new type of plasma edge damage was identified for the first time. The oxide charging damage, which is due to tunneling current flowing through the gate oxide, leaves the device more susceptible to Fowler-Nordheim degradation; while the edge damage, which is due to direct plasma exposure in lightly -doped-drain (LDD) region, leaves the MOSFETs more vulnerable to hot-carrier stress. The oxide latent damage was also studied and revealed by Fowler-Nordheim injection of electron into the damaged oxide. Impact of edge damage on MOS device low temperature operation was studied and found that the degraded device characteristic is mainly due to the increase of source/drain series resistance at low temperature. The roles of oxide charging damage and plasma edge damage were isolated and characterized for both n -channel and p-channel MOS devices, and corresponding dependence of hot-carrier lifetime was analyzed. The impact of plasma damage on hot-carrier degradation of a ring oscillator was also investigated. The oxide thickness dependence of hot-carrier degradation was observed and proved to be mostly due to the influence of vertical electric field. Finally, to minimize the plasma damage, the effectiveness of gate protection diode in avoiding oxide charging was evaluated and the limitation of the protection diode was identified. The influence of various plasma etching tool configurations and parameters was studied. We discovered that etching chemistries, in addition to the obvious importance of tool configurations and parameters, are very critical in controlling and minimizing the plasma damage.
- Publication:
-
Ph.D. Thesis
- Pub Date:
- January 1995
- Bibcode:
- 1995PhDT.......120L
- Keywords:
-
- INTEGRATED CIRCUITS;
- OXIDE CHARGING;
- Engineering: Electronics and Electrical; Physics: Condensed Matter