Detection of multiple-bit errors from single-ion tracks in integrated circuits

A error detector and imaging system for multiple-bit errors from single-ion tracks in integrated circuits distinguishes between multiple bit errors caused by ion tracks which do not strike charge collection junctions having substantial capacitance and those that do on the basis of the sensitivity of the errors to changes in VDD. Data which do not occur during the time interval between successive read cycles, which do not occur at integral multiples of the read clock, whose recorded time tags are not greater than those of previous data or whose recorded address tags are not greater than those of previous data are discarded as bad data before further processing and display.