Test diagnostics of RF effects in integrated circuits

The results are presented for an effort to measure the RF upset susceptibilities of CMOS and low power Schottky integrated circuits and to demonstrate a test probe methodology for measuring RF noise coupling, generation, and propagation into and upon these integrated circuits chips. RF interference used was continuous wave CW from 1MHz to 200MHz. This was combined with the digital signal using an op-amp combiner and directly coupled into the device ports. Upset threshold voltage levels were measured, complex input impedances were measured, and upset power levels were calculated and plotted. A scanning electron microscope (SEM), quantitative voltage contrast (QVC) system was used to measure internal waveforms along the intended signal path, on adjacent metals runs, and an internal power and ground connections.