A memory-based high-speed digital delay line with a large adjustable length Mattausch, H. -J. ; Matthiesen, F. ; Hartl, J. ; Tielert, R. ; Jacobs, E. P. Abstract Publication: IEEE Journal of Solid-State Circuits Pub Date: February 1988 DOI: 10.1109/4.265 Bibcode: 1988IJSSC..23..105M