BICMOS for high performance, high density applications

A BICMOS technology concept is introduced that permits bipolar transistors to be implemented in a CMOS technology with little extra expense. In order to show the performance gain of BICMOS compared to pure CMOS, a Totem Pole buffer, one of the basic BICMOS circuits, is investigated and a simple analytical model for the gate delay time is developed. Further system aspects are considered, and an example is used to point out the advantages of BICMOS compared to CMOS and Bipolar.