Switch-level timing simulation of MOS VLSI (Metal-Oxide-Semiconductor Very Large-Scale Integrated) circuits
Abstract
The development of a fast and accurate simulation tool for very-large-scale integrated (VLSI) circuits consisting of metal-oxide-semiconductor (MOS) transistors is described. Such tools are called switch-level timing simulators and they provide adequate information on the performance of the circuits with a reasonable expenditure of computation time even for very large circuits. The algorithms presented in this thesis can handle only n-channel MOS(NMOS) circuits, but are easily extendible to handle complementary MOS(CMOS) circuits as well. The algorithms presented report have been implemented in a computer program called MOSTIM. In all the circuits simulated thus far, MOSTIM provides timing information with an accuracy of within 10% of that provided by SPICE2, at approximately two orders of magnitude faster in simulation speed.
- Publication:
-
Final Technical Report
- Pub Date:
- January 1985
- Bibcode:
- 1985uill.rept.....R
- Keywords:
-
- Algorithms;
- Computerized Simulation;
- Integrated Circuits;
- Metal Oxide Semiconductors;
- Transistor Circuits;
- Very Large Scale Integration;
- Accuracy;
- Time Measurement;
- Velocity;
- Electronics and Electrical Engineering