Parallel implementation of linear feedback shift register circuits

A simple procedure is developed for converting a known serial feedback shift register (FSR) to a parallel FSR configuration. The serial structure is first described by a matrix equation, and then elementary operations are performed that yield a matrix description of the corresponding parallel circuit. No actual matrix operations are required in this method. The technique considerably simplifies the process of designing parallel FSR circuits, and the resulting parallel structure often permits such system advantages as lower clock rates and greatly reduced chip counts.