Soft-error generation due to heavy-ion tracks in bipolar integrated circuits
Abstract
Both bipolar and MOS integrated circuits have been empirically demonstrated to be susceptible to single-particle soft-error generation, commonly referred to as single-event upset (SEU), which is manifested in a bit-flip in a latch-circuit construction. Here, the intrinsic characteristics of SEU in bipolar (static) RAM's are demonstrated through results obtained from the modeling of this effect using computer circuit-simulation techniques. It is shown that as the dimensions of the devices decrease, the critical charge required to cause SEU decreases in proportion to the device cross-section. The overall results of the simulations are applicable to most integrated circuit designs.
- Publication:
-
NASA STI/Recon Technical Report A
- Pub Date:
- August 1984
- Bibcode:
- 1984STIA...8519090Z
- Keywords:
-
- Bipolar Transistors;
- Bit Error Rate;
- Circuit Protection;
- Integrated Circuits;
- Ion Irradiation;
- Particle Tracks;
- Radiation Damage;
- Circuit Diagrams;
- Computer Aided Design;
- Computerized Simulation;
- Error Analysis;
- Heavy Ions;
- Mathematical Models;
- Metal Oxide Semiconductors;
- Electronics and Electrical Engineering