A family of special purpose microprogrammable digital signal processor IC's in an LPC vocoder system

A design has recently been completed of a family of CMOS integrated circuits which feature a low-cost, low-power consumption, small physical size approach to measurement of the parameters of speech normally used in Linear Predictive Coding (LPC) voice coders (vocoders). The CMOS Digital Signal Processing (DSP) IC family consists of an LPC analysis IC, an AMDF pitch extraction IC, and an LPC synthesis IC. Each IC is a microprogrammed digital signal processor. The analysis (transmit) IC's contain internal ROM programming to process speech directly from an A/D converter and generate parameters common to LPC/RELP vocoder algorithms. The IC's have been combined with a general purpose microprocessor to implement a low-power, small-size vocoder, which will code voice at 2400 bits/s, interoperable with DOD LPC-10 vocoders. Explanations of the algorithmic tradeoff analysis leading to dedicated silicon implementation are discussed, and it is shown that specialized VLSI designs allow algorithm implementations beyond the reach of general purpose processors.