Development of a two micro MOS process line for fabrication of VLSI products
Abstract
The development of a Si-Gate-process for fabrication of VLSI-products with minimum linewidth down to 2 microns is described. In a pilot-process-line dedicated to this task modern equipment for line definition and film deposition is installed. As test-vehicles for the evaluation of the processline dynamic memories (16 k bit) and microprocessor-circuits (8085) are successfully employed.
- Publication:
-
NASA STI/Recon Technical Report N
- Pub Date:
- December 1982
- Bibcode:
- 1982STIN...8323522H
- Keywords:
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- Metal Oxide Semiconductors;
- Microprocessors;
- Very Large Scale Integration;
- Computer Storage Devices;
- Gates (Circuits);
- Integrated Circuits;
- Silicon;
- Electronics and Electrical Engineering