Ionizing radiation response of GaAs JFETs and DCFL circuits

The transient responses and logic upset threshold dose rates due to ionizing radiation pulses of 20 nsec duration from a LINAC are given for the cases of planar, all-ion implanted GaAs E-JFETs and direct coupled field effect transistor logic (DCFL) ICs. It is experimentally verified that the logic upset dose rate of the former is inversely proportional to the square of their channel length. A theoretical relation for logic upset dose rate, and a correlation of experimental results with theory, are presented. A model is presented for the fact that long term conductance transients are not inherent to E-JFET inverters with resistive and depletion mode JFET load, but are present in source-follower circuits.