Firstorder modeling of oxideisolated ISL
Abstract
A model is derived for an oxideisolated ISL gate with 3micron minimum details and fanout = 4. The model includes an npn transistor, a pnp transistor, a silicon diode, and four Schottkybarrier diodes. Special attention is paid to all temperature coefficients of the device parameters. Very good agreement is obtained with measurements in the temperature range from 25 to 125 C. Due to the p(+) channelstopper in the process, the collector series resistance of the clamp pnp is relatively small.
 Publication:

IEEE Transactions on Electron Devices
 Pub Date:
 April 1982
 DOI:
 10.1109/TED.1982.20761
 Bibcode:
 1982ITED...29..675L
 Keywords:

 Bipolar Transistors;
 Integrated Circuits;
 Logic Circuits;
 Oxide Films;
 Schottky Diodes;
 Equivalent Circuits;
 Large Scale Integration;
 Mathematical Models;
 NPN Junctions;
 PNP Junctions;
 Silicon Junctions;
 Systems Simulation;
 Time Lag;
 Vhsic (Circuits);
 Electronics and Electrical Engineering