First-order modeling of oxide-isolated ISL
Abstract
A model is derived for an oxide-isolated ISL gate with 3-micron minimum details and fan-out = 4. The model includes an n-p-n transistor, a p-n-p transistor, a silicon diode, and four Schottky-barrier diodes. Special attention is paid to all temperature coefficients of the device parameters. Very good agreement is obtained with measurements in the temperature range from 25 to 125 C. Due to the p(+) channel-stopper in the process, the collector series resistance of the clamp p-n-p is relatively small.
- Publication:
-
IEEE Transactions on Electron Devices
- Pub Date:
- April 1982
- DOI:
- 10.1109/T-ED.1982.20761
- Bibcode:
- 1982ITED...29..675L
- Keywords:
-
- Bipolar Transistors;
- Integrated Circuits;
- Logic Circuits;
- Oxide Films;
- Schottky Diodes;
- Equivalent Circuits;
- Large Scale Integration;
- Mathematical Models;
- N-P-N Junctions;
- P-N-P Junctions;
- Silicon Junctions;
- Systems Simulation;
- Time Lag;
- Vhsic (Circuits);
- Electronics and Electrical Engineering