Gigabit logic operation with enhancement-mode GaAs MESFET IC's
Abstract
Enhancement-mode GaAs MESFET IC's have been fabricated using electron-beam lithography. A recessed-gate structure to reduce the gate-to-source resistance and an air-bridge overlay interconnect to reduce stray capacitance were employed. A 30-ps delay time with an associated power dissipation of 1.9 mW is obtained with a 0.6 x 20 micron gate GaAs MESFET, which is the highest speed among the GaAs FET logics. Divide-by-eight counter has exhibited a 3.8-GHz maximum clock frequency with a power dissipation of 1.2 mW/gate.
- Publication:
-
IEEE Transactions on Electron Devices
- Pub Date:
- February 1982
- DOI:
- 10.1109/T-ED.1982.20684
- Bibcode:
- 1982ITED...29..199M
- Keywords:
-
- Dtl Integrated Circuits;
- Energy Dissipation;
- Field Effect Transistors;
- Gallium Arsenides;
- Schottky Diodes;
- Time Lag;
- Capacitance;
- Fabrication;
- Gates (Circuits);
- Lithography;
- Production Engineering;
- Electronics and Electrical Engineering