High-reliability, low-cost integrated circuits
Abstract
Wafer fabrication is proceeding as scheduled. The technology development for platimum sputter etching using gold as the etch mask has progressed sufficiently to allow conversion of the COS/MOS circuits to sputter etching. Reliability data to date obtained on CA741 devices shows a 0.0044% per 1000 hours failure rate at 120 C at the 60-percent confidence level. Copper migration in epoxy packages at 125 C has not been observed as a failure mode. Salt atmosphere resistance tests to date have produced excellent results. All required life-test sockets for Phase II and some of the sockets for Phase III of the program have been ordered.
- Publication:
-
Quarterly Development Report
- Pub Date:
- August 1977
- Bibcode:
- 1977rca..reptU.....
- Keywords:
-
- Circuit Reliability;
- Cost Estimates;
- Integrated Circuits;
- Metal Oxide Semiconductors;
- Ceramics;
- Gold;
- Life (Durability);
- Reliability Analysis;
- Titanium;
- Electronics and Electrical Engineering