Design of a phase-lock loop with time delay for a synchronous multiple-access system via on-board signal processing satellite
Abstract
The development of on-board satellite retransmitters for parallel or sequential relay of signals to ground stations is discussed, and a nonlinear phase-locked loop with variable time delay, applicable to clock synchronization in multiple-access communications systems, is analyzed. The asymptotic error of an equivalent linear phase-locked loop is determined by reference to the destabilizing divergence of the clock frequencies and the delay in the feedback loop. Necessary conditions for steady phase synchronization are specified; the maximum dynamic error of the phase-locked loop relay system is approximated. It is concluded that a sufficiently accurate system can be achieved at clock frequencies from 50 to 100 Mbit/sec, regardless of the type of satellite orbit studied.
- Publication:
-
Prague International Astronautical Federation Congress
- Pub Date:
- September 1977
- Bibcode:
- 1977prag.iafcT....M
- Keywords:
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- Phase Locked Systems;
- Relay Satellites;
- Satellite Networks;
- Signal Processing;
- Spacecraft Communication;
- Block Diagrams;
- Clocks;
- Error Analysis;
- Optimization;
- Satellite-Borne Instruments;
- Synchronism;
- Transmitters;
- Volt-Ampere Characteristics;
- Electronics and Electrical Engineering