Method of clock and carrier synchronization with Class-4 partial-response pulses

Clock and carrier control for PR4-pulse data transmission systems at 48, 56, 64 or 72 kbits/sec in the primary group band 68-100 kHz is described. A new method for establishing synchronism at the beginning of transmission in a short time without use of special startup techniques is described. By this method, clock and carrier phases are transferred from arbitrary initial values to near-optimum values by means of an estimate of the mean absolute data signal error. The phases are then corrected by means of the deviations of the partial response pulses at the sampling instants. The correction values are derived from the demodulated data signal by correlation.