Accelerated testing highlights CMOS failure modes
Abstract
The results from an extensive matrix of CMOS accelerated life tests are described. Multiple lots of CMOS 4007 microcircuits were subjected to step stress and extended life tests at ambient temperatures between 125 C and 275 C with applied voltages between 0 Vdc and 15 Vdc. A total of 805 devices were subjected to accelerated life tests for time periods between 128 hours and 9500 hours. Analysis of 571 failed devices showed that surface related problems were responsible for 95% of the failures at both the maximum rated use temperature (125 C) and accelerated test temperatures between 200 C and 250 C. Out-of-tolerance parameter values due to increased leakage currents and threshold voltage shifts in both n and p-channel transistors were the primary failure symptoms.
- Publication:
-
EASCON 1976; Electronics and Aerospace Systems Convention
- Pub Date:
- 1976
- Bibcode:
- 1976easc.conf..142J
- Keywords:
-
- Accelerated Life Tests;
- Failure Modes;
- Metal Oxide Semiconductors;
- Semiconductor Devices;
- System Failures;
- Component Reliability;
- Fabrication;
- Microelectronics;
- Surface Defects;
- Threshold Voltage;
- Transistor Circuits;
- Volt-Ampere Characteristics;
- Electronics and Electrical Engineering