Graph modeling and model simplification techniques for fault analysis in sequential switching circuits
Abstract
An algorithmic procedure is developed which can be used to generate a special form of the Petri Net graphs, called a CFN Logic Model, which describes the functional behavior of a digital switching circuit. In order to represent the effects of physical faults in circuits, transformation procedures are developed which modify the structure of a CFN Logic Model. These structural modifications are defined such that the circuit behavior that is represented by a resulting CFN Fault Model has a onetoone correspondence with the behavior of the actual faulty circuit. Methods are developed to estimate the structural complexity of a CFN Logic Model or Fault Model for a circuit as compared to the complexity of the circuit logic schematic. Reduced forms of the CFN Fault Models are used to identify equivalence and covering relations between faults in digital switching circuits. This information is used to simplify any fault detection or fault diagnosis schemes that are derived for a switching circuit.
 Publication:

Ph.D. Thesis
 Pub Date:
 1976
 Bibcode:
 1976PhDT........75B
 Keywords:

 Digital Computers;
 Error Detection Codes;
 Sequential Control;
 Switching Circuits;
 Algorithms;
 Computer Programming;
 Logic Circuits;
 Logic Design;
 Electronics and Electrical Engineering