Radiation hardened 64-bit CMOS/SOS RAM
Abstract
Radiation hardening procedures have been implemented in design, analysis and fabrication of a 64-bit CMOS/SOS RAM. The resultant circuit is a moderately complex (714 transistor), dielectrically isolated integrated circuit which features high performance and high radiation tolerance. Typical electrical parameters include 120 nsec read-access time and 1 microwatt/bit standby power dissipation. The SOS construction minimizes radiation-induced transient photocurrents while a hardened gate insulator provides immunity to total dose effects. Transient radiation upset levels exceed 30 Grad (Si)/sec for short pulses and ionizing dose hardness exceeds 1 krad (Si). A neutron fluence of 365 trillion neutrons per sq cm had no effect on circuit operation beyond that expected from the ionizing radiation alone.
- Publication:
-
IEEE Transactions on Nuclear Science
- Pub Date:
- December 1976
- DOI:
- Bibcode:
- 1976ITNS...23.1728K
- Keywords:
-
- Integrated Circuits;
- Ionizing Radiation;
- Metal Oxide Semiconductors;
- Radiation Hardening;
- Random Access Memory;
- Sos (Semiconductors);
- Field Effect Transistors;
- Photoelectric Emission;
- Pulse Duration;
- Pulsed Radiation;
- Radiation Tolerance;
- Transient Response;
- Electronics and Electrical Engineering