Digital microcircuit characterization and specification, volume 2 and 3

The volume consists of logic integrity test (LIT) reports for tests generated for the integrated circuit devices listed in the index. All of the tests are for devices that either are already included in MIL-M-38510 slash sheets or are to be included in future slash sheets. LIT's were generated for TTL, STTL and CMOS family types. For the CMOS devices, additional tests were generated to check for worst case leakage paths. As a part of the test generations, the tests were proved by testing representative devices. In some instances LIT's were submitted by integrated circuit manufacturers whereupon they were checked for accuracy and completeness and then were edited, updated and proof tested.