Design of reliable asynchronous sequential machines

A number of design procedures for self-testable circuits are developed. The fault conditions are those where inputs or outputs of gates assume a stuck-at-1 (s-a-1) or stuck-at-0 (s-a-0) state. Included is the situation where all or part of a feedback path becomes s-a-1 or s-a-0. This case is of extreme importance since, due to the nature of an asynchronous machine and its feedback capabilities, a single fault can cause failures in several internal state variables. The class of faults detected can easily be extended to a much greater range once the detection scheme employed here is understood. The fault detecting circuits are derived via a systematic approach yielding a machine which, under fault conditions, assumes an easily recognizable state, hence the self-testing aspect.