A 4-Mb pseudo SRAM operating at 2.6+or-1 V with 3- mu A data retention current Sato, K. ; Kenmizaki, K. ; Kubono, S. ; Mochizuki, T. ; Aoyagi, H. ; Kanamitsu, M. ; Kunito, S. ; Uchida, H. ; Yasu, Y. ; Ogishima, A. ; Sano, S. ; Kawamoto, H. Abstract Publication: IEEE Journal of Solid-State Circuits Pub Date: November 1991 DOI: 10.1109/4.98972 Bibcode: 1991IJSSC..26.1556S