Realizing a robust, reconfigurable active quenching design for multiple architectures of single-photon avalanche detectors
Most active quench circuits used for single-photon avalanche detectors are designed either with discrete components which lack the flexibility of dynamically changing the control parameters, or with custom ASICs which require a long development time and high cost. As an alternative, we present a reconfigurable and robust hybrid design implemented using a System-on-Chip (SoC), which integrates both an FPGA and a microcontroller. We take advantage of the FPGA's speed and configuration capabilities to vary the quench and reset parameters dynamically over a large range, thus allowing our circuit to operate with a wide variety of APDs without having to re-design the system. The microcontroller enables the remote adjustment of control parameters and re-calibration of APDs in the field. The ruggedized design uses components with space heritage, thus making it suitable for space-based applications in the fields of telecommunications and quantum key distribution (QKD). We characterize our circuit with a commercial APD cooled to -20°C, and obtain a deadtime of 35ns while maintaining the after-pulsing probability at close to 3%. We also demonstrate versatility of the circuit by directly testing custom fabricated chip-scale APDs, which paves the way for automated wafer-scale testing and characterization.
Society of Photo-Optical Instrumentation Engineers (SPIE) Conference Series
- Pub Date:
- March 2022
- Physics - Instrumentation and Detectors
- 8 pages, 6 figures, Included in SPIE Proceedings Volume 12008, Photonic Instrumentation Engineering IX