HEXITEC ASIC—a pixellated readout chip for CZT detectors
Abstract
HEXITEC is a collaborative project with the aim of developing a new range of detectors for high-energy X-ray imaging. High-energy X-ray imaging has major advantages over current lower energy imaging for the life and physical sciences, including improved phase-contrast images on larger, higher density samples and with lower accumulated doses. However, at these energies conventional silicon-based devices cannot be used, hence, the requirement for a new range of high Z-detector materials. Underpinning the HEXITEC programme are the development of a pixellated Cadmium Zinc Telluride (CZT) detectors and a pixellated readout ASIC which will be bump-bonded to the detector. The HEXITEC ASIC is required to have low noise (20 electrons rms) and tolerate detector leakage currents. A prototype 20×20 pixel ASIC has been developed and manufactured on a standard 0.35 μm CMOS process.
- Publication:
-
Nuclear Instruments and Methods in Physics Research A
- Pub Date:
- June 2009
- DOI:
- 10.1016/j.nima.2009.01.046
- Bibcode:
- 2009NIMPA.604...34J