Polarity dependent breakdown of the high-κ /SiOx gate stack: A phenomenological explanation by scanning tunneling microscopy

From scanning tunneling microscopy, we present unambiguous evidence of thermally induced localized conduction paths exhibiting an asymmetrical conduction property in the high-κ gate stack. The tunneling current under gate injection biasing is found to be much larger than that under substrate injection biasing after a 700°C postdeposition anneal, i.e., the localized paths exhibit a much lower resistance under gate injection biasing. This finding provides a phenomenological explanation for the polarity dependent breakdown of the high-κ gate stack as observed from electrical stressing of large-area metal-oxide-semiconductor capacitors.