Memory effect in MIS structures with amorphous silicon nanoparticles embedded in ultra thin SiOx matrix

Metal/SiO₂/a-Si-SiO_x/c-Si structures containing amorphous silicon nanoparticles (a-Si NPs) embedded in ultra thin SiO_x matrix are fabricated by thermal evaporation of SiO_x and sputtering of SiO₂ layers followed by thermal annealing at 700C. A memory effect, due to charging of a-Si NPs in SiO_x, is observed. The processes of NP charging and discharging are accomplished by applying pulses with alternative polarities. The observed shift of the flat band voltage of the high-frequency C V curve caused by a voltage pulse of -15V having duration of 1 s is more than 3 V. In addition, the structures show good retention characteristics which make them promising for application in non-volatile memory devices.