Advanced Simulation of Hot Electron Phenomena and Reliability in Deep-Submicron Silicon Devices.

This research is directed towards the development and implementation of an advanced simulation approach to investigate hot electron phenomena and reliability behavior in next-generation silicon MOSFET structures. In this approach, the formidable task of modeling hot carrier phenomena in devices under both nonlocal carrier transport and low -voltage bias conditions is accomplished through the use of the comprehensive Monte Carlo method, while, at the same time, the less demanding task of predicting degradation of macroscopic device characteristics is performed by less computationally intensive drift-diffusion and energy transport models. Hot-electron-induced device degradation is predicted by coupling distributions of hot electron injection into the oxide provide by Monte Carlo simulations with empirical models for induced silicon-insulator interface damage. The generated distributions of interface damage are then placed back into the Monte Carlo simulator and the commercial device simulator to predict changes in hot carrier phenomena and device performance characteristics, respectively, as a function of stress time. Several high-performance design strategies proposed for the 0.1 μm regime of silicon device technology were investigated using the advanced simulation approach. These design strategies include both drain-engineering and channel-engineering in both bulk and Silicon-On-Insulator (SOI) device structures. Monte Carlo simulation results show that mainly due to short -range Coulomb interactions (electron-electron scattering) carriers can attain energies greatly exceeding the energy supplied by the external drain bias, a result that is supported by recent experimental studies. Moreover, simulations demonstrate that highly two-dimensional electric field and current density distributions near the drain junction contribute to some surprising trends in hot carrier phenomena. Furthermore, simulations of hot-electron-induced device degradation for the different MOSFET design strategies indicate that the total rate of hot electron injection into the oxide is not an accurate measure of device reliability. This important result is attributed to the varying degree of device sensitivity to distributions of induced interface damage for the different MOSFET design strategies.