Optimization of silicon microstrip detector design for CLEO III
Abstract
We present measurements from prototype silicon microstrip detectors for the CLEO III silicon vertex detector. Noise and capacitance optimization is discussed. We also present a design to achieve 10 pF total capacitance on a double sided, double metal silicon detector.
- Publication:
-
Nuclear Instruments and Methods in Physics Research A
- Pub Date:
- February 1996
- DOI:
- 10.1016/S0168-9002(96)00662-6
- Bibcode:
- 1996NIMPA.383...98H