Digital laser range finder emulator
Abstract
A digital laser range finder emulator receives N-bits of range-to-target data in a parallel format and generates N-bits of serial data representative of the range-to-target data and an external synchronization pulse whose presence is indicative of valid serial data. First and second clock pulses are generated such that the second clock pulse is delayed with respect to the first clock pulse. Control logic, responsive to the first clock pulse, generates validity logic while control logic, responsive to the second clock pulse, generates transmit logic. The parallel format range-to-target data is converted into the serial data in response to the first clock pulse. The serial data is then output in response to the transmit logic. A gate, responsive to the second clock pulse and the validity logic, generates the synchronization pulse when the second clock pulse and validity logic occupy a common logic state.
- Publication:
-
Patent Department of the Navy
- Pub Date:
- May 1993
- Bibcode:
- 1993navy.reptU....M
- Keywords:
-
- Digital Systems;
- Laser Range Finders;
- Logic Circuits;
- Pulse Generators;
- Rangefinding;
- Sequential Control;
- Synchronism;
- Control Systems Design;
- Data Processing;
- Laser Applications;
- Optical Measuring Instruments;
- Patents;
- Lasers and Masers