A single-chip GaAs implementation of an FIR-median hybrid filter is presented. The very high-speed digital filter combines linear averaging structures to a median selector. The filter operates on 5-b samples with ECL-compatible I/O interfaces. The 1500-transistor LSI device with 3.6-sq mm chip size was processed with a 1.0-micron GaAs depletion-mode (D-mode) MESFET process. The filter demonstrates 600-MHz sample rate when operated in test mode utilizing special built-in feedback.