Resonant Tunneling in MOS Devices.

Resonant tunneling has been observed in a novel MOS device. The device is a modelled silicon n-MOSFET structure in which a small gap is patterned in the gate between the source and drain. The gap produces a discontinuity in the inversion layer which becomes two separate but closely spaced inversion layers. The area between the inversion layers is a region of depleted silicon of length approximately 1000 A which can be modeled as a potential barrier to electron flow. Conductance between source and drain which is dominated by the noninverted silicon region is measured as a function of gate voltage at various temperatures, substrate biases, and perpendicular magnetic fields. At temperatures from room temperature to nearly 10 K, the conductance is activated as electrons are thermally excited over the barrier. Below 10 K, structure appears in the conductance vs. gate voltage curves in the form of overlapping or isolated peaks of maximum conductance less than e ^2/h. The peaks are due to resonant tunneling from one inversion layer through an impurity in the depleted silicon to the other inversion layer. The temperature dependence of these peaks has been shown to be simply due to the thermal distribution of incident electrons in the inversion layers. At temperatures below 1 K some conductance peaks become temperature independent and have the characteristic Lorentzian energy dependence with a full width at half maximum of about 1 meV. In a magnetic field, the conductance peaks decrease in both height and width due to the diamagnetic shrinking of the electron wavefunction associated with the resonant energy level. From the magnetic field dependence, various parameters could be deduced such as barrier height, barrier width, and the distance the resonant site was from the center of the barrier.