Ion implantation of semiconductor devices frequently leads to a substantial device and wafer charge buildup. If charging is not compensated, device potentials may reach sufficient levels to damage insulators and reduce product yields. Even if such levels are not reached, charge buildup may affect ion beam propagation resulting in nonuniform implants and again a reduction of device yields. The physics governing wafer charging is reviewed. All machine designs require some form of charge neutralization, if modem devices are to be successfully implanted with any degree of consistency. Several schemes for charge neutralization are reviewed. Special emphasis is given to secondary electron techniques. With properly optimized neutralization device charging during ion implantation can be kept to ±10 V.