A self-aligned gate III-V heterostructure FET process for ultrahigh-speed digital and mixed analog/digital LSI/VLSI circuits
Abstract
A planar ion-implanted self-aligned gate process for the fabrication of high-speed digital and mixed analog/digital LSI/VLSI integrated circuits is reported. A 4-b analog-to-digital converter, a 2500-gate 8 x 8 multiplier/accumulator, and a 4500-gate 16 x 16 complex multiplier have been demonstrated using enhancement-mode n(+)-(Al,Ga)As/MODFETs, superlattice MODFETs, and doped channel heterostructure field-effect transistors (FETs) whose epitaxial layers were grown by molecular-beam epitaxy. With nominal 1-micron gate-length devices, direct-coupled FET logic ring oscillators with realistic circuit structures have propagation delays of 30 ps/stage at a power dissipation of 1.2 mW/stage. In LSI circuit operation, these gates have delays of 89 ps/gate at a power dissipation of 1.38 mW/gate when loaded with an average fan-out of 2.5 gates and about 1000 microns of high-density interconnects. High-performance voltage comparator circuits operated at sampling rates greater than 2.5 GHz at Nyquist analog input rates and with static hysteresis of less than 1 mV at room temperature. Fully functional 4-b analog-to-digital circuits operating at frequencies up to 2 GHz were obtained.
- Publication:
-
IEEE Transactions on Electron Devices
- Pub Date:
- October 1989
- DOI:
- 10.1109/16.40901
- Bibcode:
- 1989ITED...36.2204A
- Keywords:
-
- Analog Circuits;
- Field Effect Transistors;
- Heterojunction Devices;
- Logic Circuits;
- Self Alignment;
- Very Large Scale Integration;
- Analog To Digital Converters;
- Carrier Density (Solid State);
- Large Scale Integration;
- Mixing Circuits;
- Modfets;
- Molecular Beam Epitaxy;
- Superlattices;
- Electronics and Electrical Engineering