Passtransistor asynchronous sequential circuits
Abstract
Design methods for asynchronous sequential passtransistor circuits, which result in circuits that are hazard and criticalracefree and which have added degrees of freedom for the input signals, are discussed. The design procedures are straightforward and easy to implement. Two singletransitiontime state assignment methods are presented, and hardware bounds for each are established. A surprising result is that the hardware realizations for each next state variable and output variable is identical for a given flow table. Thus, a state machine with N states and M outputs can be constructed using a single layout replicated N + M times.
 Publication:

IEEE Journal of SolidState Circuits
 Pub Date:
 February 1989
 DOI:
 10.1109/4.16304
 Bibcode:
 1989IJSSC..24...71W
 Keywords:

 Cmos;
 Logic Circuits;
 Transistor Circuits;
 Very Large Scale Integration;
 Algorithms;
 Design Analysis;
 Feedback Circuits;
 Sequencing;
 Electronics and Electrical Engineering