Processing enhanced SEU tolerance in high density SRAMs
Abstract
Calculations and experimental verification are reported of an increase in memory-cell SEU (single-event upset) tolerance when Sandia's 2-micron-technology 16K static RAMs are fabricated with a radiation-hardened 1-micron CMOS process. An advanced 2-D transient transport-plus-circuit simulator was used to calculate the differential contributions from each of the vertical dimensional changes in the transition from the 2-micron to the 1-micron process. Error-cross-section data, collected at the Berkeley cyclotron from the first such device lot indicate that total improvement in threshold LET is a factor of two or better. A saturation phenomenon associated with the high-LET events is described, and physical mechanisms responsible for the saturation are discussed.
- Publication:
-
IEEE Transactions on Nuclear Science
- Pub Date:
- December 1987
- DOI:
- 10.1109/TNS.1987.4337473
- Bibcode:
- 1987ITNS...34.1322F
- Keywords:
-
- Radiation Tolerance;
- Random Access Memory;
- Single Event Upsets;
- Cmos;
- Error Analysis;
- Linear Energy Transfer (Let);
- Memory (Computers);
- Radiation Transport;
- Electronics and Electrical Engineering