Retiming synchronous circuitry
Abstract
This paper shows how the technique of retiming can be used to transform a given synchronous circuit into a more efficient circuit under a variety of different cost criteria. We model a circuit as a graph, and we give an O(/V/ /E/lg/V/) algorithm for determining an equivalent circuit with the smallest possible clock period. We show that the problem of determining an equivalent retimed circuit with minimum state (total number of registers) is polynomialtime solvable. This result yields a polynomialtime optimal solution to the problem of pipelining combinational circuitry with minimum register cost. We also give a characterization of optimal retiming based on an efficiently solvable mixedinteger linear programming problem.
 Publication:

Massachusetts Inst. of Tech. Report
 Pub Date:
 May 1986
 Bibcode:
 1986mit..reptR....L
 Keywords:

 Algorithms;
 Equivalent Circuits;
 Graphs (Charts);
 Optimization;
 Costs;
 Linear Programming;
 Mathematical Models;
 Polynomials;
 Problem Solving;
 Registers (Computers);
 Electronics and Electrical Engineering