A 70-MHz 8-bit×8-bit parallel pipelined multiplier in 2.5-μm CMOS Hatamian, M. ; Cash, G. L. Abstract Publication: IEEE Journal of Solid-State Circuits Pub Date: August 1986 DOI: 10.1109/JSSC.1986.1052564 Bibcode: 1986IJSSC..21..505H