CMOS RF circuits for data communications applications

This paper will describe the recent development of two analog CMOS circuits operating at RF frequencies with applications to data communications. One of them is a four-quadrant analog multiplier which exhibits a 100-MHz bandwidth with the measured linearity error of 0.7 percent for the X and Y inputs of 0.6 and 0.8 V, respectively, and the other is a 90-deg phase shifter which maintains the gain and phase errors of less than 0.5 dB and 3 deg, respectively, for the signal within 40-60-MHz frequency range.