Monolithically integrated enhancement-mode InP MISFET inverter
Abstract
Three InP MISFETs have been monolithically integrated on an Fe-doped semi-insulating InP substrate in conjunction with three integrated load resistors forming an inverter. The epitaxial layers have been grown by chloride vapor-phase epitaxy. The MISFETs exhibit transconductances as high as 200 mS/mm for a gate length of 1 micron. The circuit consists of one MISFET that is operated as a one transistor-inverter stage in isolation and a two-stage inverter whose output is connected to the gate of an FET. For two-stage inverters, typical high- and low-level noise margins of 0.4 and 0.3 V were obtained at a bias level of 1.5 V.
- Publication:
-
Electronics Letters
- Pub Date:
- September 1986
- DOI:
- 10.1049/el:19860693
- Bibcode:
- 1986ElL....22.1014A
- Keywords:
-
- Field Effect Transistors;
- Indium Phosphides;
- Integrated Circuits;
- Inverters;
- Mis (Semiconductors);
- Equivalent Circuits;
- Logic Circuits;
- Resistors;
- Volt-Ampere Characteristics;
- Electronics and Electrical Engineering