GaInAs junction FET with InP buffer layer prepared by selective ion implantation of Be and rapid thermal annealing

GaInAs JFETs were fabricated on VPE-grown GaInAs layers. The pn junctions have been realized with Be ion implantation and rapid thermal annealing. The devices show a high transconductance of 130 mS/mm and an electron saturation velocity of 1.8 x 10 to the 7th cm/s. Channel mobilities measured at the complete device are as high as 6800 sq cm/V s. These excellent device properties are due to the use of an undoped InP buffer layer which avoids the diffusion of Fe from the substrate into the active layer. The data were supported by S-parameter measurements which gave a frequency limit of 20 GHz for gate dimensions of 1.6 by 200 sq microns.