Low noise polycrystalline silicon resistors are fabricated in the following sequence: (1) deposit an appropriate thickness of polysilicon (e.g., 400nm) on top of an oxidized wafer, (2) resistor doping by ion implantation (e.g., phosphorous), (3) heavy doping of the end-contact regions of the polysilicon resistor by high-dose ion implantation, (4) patterning the polysilicon resistor, (5) oxidation/annealing the polysilicon resistor, (6) open contacts to the polysilicon resistor, (7) aluminum metallization to form ohmic contacts, and (8) a long (e.g., 3 hours) low temperature (e.g., at 375 deg) pure hydrogen annealing to passivate the interface states in the polysilicon resistor. Polyresistors processed this way have a noise figure that is about a factor of three lower than samples processed otherwise. The low temperature post metallization annealing in pure hydrogen passivates the interfaces of polyresistors, reducing the 1/f noise normally generated therein.
Patent Application Department of the Air Force
- Pub Date:
- April 1985
- Low Noise;
- Patent Applications;
- Semiconductor Devices;
- Electronics and Electrical Engineering