Radiation hardened CMOS technology for flight systems

The techniques used to harden CMOS devices against the effects of radiation are examined, and the performance tradeoffs of hardened versus nonhardened devices are discussed. In particular, attention is given to the following three technologies used in the manufacture of hardened CMOS: CMOS on EPI silicon, silicon on insulator, and dielectric isolation. Finally, the hardness levels attainable with these three technologies are compared with those of bipolar devices.