Multiplexed data stream monitor

A multiplexed data stream circuit is described which comprises a random memory stream which is transmitted together with a synchronization signal and a data clock. A counter circuit is reset by the synchronization signal and counts the data clock signals to accumulate counts uniquely identified accumulated count location is addressed in the random access memory to read the immediately preceding data state of the current signal and the immediately preceding data stream signal as read from the random access memory are compared by gating circuitry to identify characteristics of the data stream. State changes of the signals within the multiplexed data stream are identified if the gating circuitry comprises an EXCLUSIVE OR gate.